Asus eee pc seashell 1005pe mu17 bk

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Asus eee pc seashell 1005pe mu17 bk - We Owe

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By : Eugeniusis Novatiukusis 14 or more times read

Submitted 2010-04-09 06:17:26

We Owe a Debt to Early Computer Bus Development

Why was thre such a rush in the developmennt of the vinttage computer bus?

All in all there were a number of ongoing improvemenst. These included. 32 bit widths. Bus mastering. Less susceptible to noise in that they were quieter in siganl transmission. More convenience of setyup of add on boards via softwre.

The ISA bus came in only 8 bit and 16 bit formats. Whereas the later 386 and 486 chips , in both the DX and SX formats while they did have a 32 bit path were hobbled by the ISA bus. As a rseult they could never relize their true 32 bit speed ptential. Later busses such as the MCA and EISA busses were able to overcome these inherent limitations.

Thee data highways referred to as : busses are the data transmission lines around the PCs. The bus seerves as the path for information transmission atround the PC. True this routing is controlled by the CPU. However as that point in vintage computinng histry this was not an issaue. The PCs were stand alone single CPU units.

However as time went on and PCs got faster and more complicated with less expensive additional CPUs hanling other tasks wihtin the PCs eents becae dicer.Onboard peripheraals themselves beagn to have built in CPUs. CPUS in different manners began to be found in such peripherals as hard drivees, sound and video cards.

The overall computer system may become much more efficient if these in essence peripheral CPUs can communicate directly with each other. without having to use the main CPU as an intermediary. Hence MCA and EISA were developed with these roles in mind. The concept became knwn as bus mastering.

Bus mastering involves the conecpt that the periipheral CPUS oculd request permission to take over the bus for a short epriod of time. The main CPU would grant permision for them to take over the bus, and it would temporarily drop out of the loop, enabling swift communications beetween for examle the hard drive and flopy disk drive.

As compter busses devloped and had the inherent aiblities to transfer more and more data in a igven time period noie became an issue. The ISA bus was fairly noise prone because it relied on triggered interrupts. Whenever the voltage level on the data line of the bus exceeded a given threshold value then Edge Triggering would result.

The alternative to this situation where Edge Triggering could resulkt is level triggerinng where it is required that the transmittting hold and archive the highr voltage level in order for data to be ercognized by the devces on the bus. Edge Triggering however can lead to transients that is brief power surges that can confuse the devices on the bus into thikning that data is on the bus when it is not. Luckilky level triggering lowers the noise levwel and both MCA and EISA employ it.

As a rsult of all of theese inheerent beneifts MCA and EISA came to support the idea, which we know take for granted, of instant software configurations. There were no swiches or jumpers on add in MCA or EISA boards. Although we take plug and play instant configuration of morther boards and peripherals such as soyund, vido or nettwork cards for granted it was not always that way. We owe a lot to tese early computer innovations of improving the computrer bus.

Author Resource:- Here you can learn more about: 1005ha vs 1005pe

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<!DOCTYPE HTML PUBLIC '-//W3C//DTD HTML 4.01 Transitional//EN' 'http://www.w3.org/TR/html4/loose.dtd'>; <html><head><title>Article2008.com | Asus eee pc seashell 1005pe mu17 bk - We Owe </title></head><body><h3>Asus eee pc seashell 1005pe mu17 bk - We Owe </h3> By: Eugeniusis Novatiukusis We Owe a Debt to Early Computer Bus Development Why was thre such a rush in the developmennt of the vinttage computer bus? <pre><code> All in all there were a number of ongoing improvemenst. These included. 32 bit widths. Bus mastering. Less susceptible to noise in that they were quieter in siganl transmission. More convenience of setyup of add on boards via softwre. The ISA bus came in only 8 bit and 16 bit formats. Whereas the later 386 and 486 chips , in both the DX and SX formats while they did have a 32 bit path were hobbled by the ISA bus. As a rseult they could never relize their true 32 bit speed ptential. Later busses such as the MCA and EISA busses were able to overcome these inherent limitations. Thee data highways referred to as : busses are the data transmission lines around the PCs. The bus seerves as the path for information transmission atround the PC. True this routing is controlled by the CPU. However as that point in vintage computinng histry this was not an issaue. The PCs were stand alone single CPU units. However as time went on and PCs got faster and more complicated with less expensive additional CPUs hanling other tasks wihtin the PCs eents becae dicer.Onboard peripheraals themselves beagn to have built in CPUs. CPUS in different manners began to be found in such peripherals as hard drivees, sound and video cards. The overall computer system may become much more efficient if these in essence peripheral CPUs can communicate directly with each other. without having to use the main CPU as an intermediary. Hence MCA and EISA were developed with these roles in mind. The concept became knwn as bus mastering. Bus mastering involves the conecpt that the periipheral CPUS oculd request permission to take over the bus for a short epriod of time. The main CPU would grant permision for them to take over the bus, and it would temporarily drop out of the loop, enabling swift communications beetween for examle the hard drive and flopy disk drive. As compter busses devloped and had the inherent aiblities to transfer more and more data in a igven time period noie became an issue. The ISA bus was fairly noise prone because it relied on triggered interrupts. Whenever the voltage level on the data line of the bus exceeded a given threshold value then Edge Triggering would result. The alternative to this situation where Edge Triggering could resulkt is level triggerinng where it is required that the transmittting hold and archive the highr voltage level in order for data to be ercognized by the devces on the bus. Edge Triggering however can lead to transients that is brief power surges that can confuse the devices on the bus into thikning that data is on the bus when it is not. Luckilky level triggering lowers the noise levwel and both MCA and EISA employ it. As a rsult of all of theese inheerent beneifts MCA and EISA came to support the idea, which we know take for granted, of instant software configurations. There were no swiches or jumpers on add in MCA or EISA boards. Although we take plug and play instant configuration of morther boards and peripherals such as soyund, vido or nettwork cards for granted it was not always that way. We owe a lot to tese early computer innovations of improving the computrer bus. </pre></code> Author Resource:-> Here you can learn more about: <a href="http://talklaptops.info/2010/02/asus-eee-pc-seashell-1005pe-mu17-bk-review/">1005ha vs 1005pe</a> Article From <a href='http://article2008.com/'>Article2008.com</a> </body></html>

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